<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"><channel><title>Ardsol blog</title><link>https://www.ardsol.com/blog/</link><description>Practical writing on DOE, simulation, P&amp;IDs, design verification and running engineering software on your own servers.</description><language>en-in</language><item><title>Why process design data should stay on your own servers</title><link>https://www.ardsol.com/blog/why-process-data-stays-on-premise/</link><guid>https://www.ardsol.com/blog/why-process-data-stays-on-premise/</guid><pubDate>Sat, 26 Sep 2026 00:00:00 +0530</pubDate><description>Process design files hold a plant's competitive core. Here is what is at stake when that data leaves the site, and what on-premise software should mean.</description></item><item><title>From DOE to P&amp;ID: where engineering handoffs lose information</title><link>https://www.ardsol.com/blog/doe-to-pid-handoffs/</link><guid>https://www.ardsol.com/blog/doe-to-pid-handoffs/</guid><pubDate>Thu, 24 Sep 2026 00:00:00 +0530</pubDate><description>Process design moves through several tools before a P&amp;ID is issued. Most errors are not bad engineering, they are data lost between stages.</description></item><item><title>Eight checks a design verification layer should run</title><link>https://www.ardsol.com/blog/design-verification-checks/</link><guid>https://www.ardsol.com/blog/design-verification-checks/</guid><pubDate>Tue, 22 Sep 2026 00:00:00 +0530</pubDate><description>Automated checks will not replace engineering review, but they can catch the consistency errors that waste it. These are the eight worth running on every design.</description></item></channel></rss>